1. Field of the Invention
This invention relates generally to integrated circuits, and more particularly to a system and method for implementing a low noise amplifier (LNA) that operates over multiple frequency bands while occupying less silicon area than known LNA implementations.
2. Description of the Prior Art
Single integrated circuit chips required to support multiple radio standards one at a time have typically done so with multiple circuit blocks/modules in the IC in which each block/module has accommodated only a single radio standard. Enhanced Data Rates for GSM (EDGE) and General Packet Radio Services (GPRS) have traditionally been designed using three or four Low-Noise Amplifiers (LNAs) cascading with the same number of mixers in which the outputs are merged together feeding a single IF/baseband circuit. Such traditional approaches are disadvantageous in that 1) a huge semiconductor area is required by multiple LNAs and mixers, and 2) long interconnect routings over a large area are needed but maintaining a low signal loss, low parasitic resistance and low parasitic capacitance for such routings is very difficult to achieve. As CMOS technology continues to scale down, the silicon cost per square millimeter (mm2) increases dramatically; and the metal interconnect quality becomes significantly worse such that metal routing across a large area becomes a major concern. It is desirable therefore to have fewer LNAs on a single chip while still being able to support multiple radio standards.
Significant research continues in the area of multi-band LNAs. One multi-band architecture 100 disclosed by Lavasani, S. H. M., Chaudhuri, B. and Kiaei, S., “A pseudo-concurrent 0.18 μm multi-band CMOS LNA,” IEEE MTT-S International Microwave Symposium Digest, v. 1, pp. A181–A184, June 2003, Kwang-Jin Koh, Mun-Yang Park, Yong-Sik Youn, Scon-Ho Han, Jang-Hong Choi, Cheon-Soo Kim, Sung-Do Kim and Hyun-Kyu Yu, “A merged structure of LNA & sub-harmonic mixer for multi-band DCR applications,” IEEE MTTS-S International Microwave Symposium Digest, v. 1, pp. 243–246, June 2003, and Chang-Soek Lee, Min-Gun Kim, Joe-Jin Lee, Kwang-Eui Pyun and Hyung-Moo Park, “A low noise amplifier for a multi-band and multi-mode handset,” IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, pp. 47–50, June 1998, is shown in FIG. 1(a) that illustrates a single IC input and broadband matching at the input and output. Another multi-band architecture 200 that uses multiple input transistors is shown in FIG. 1(b). One technique using multiple input matching networks on a printed circuit board (PCB) was proposed by Lavasani, S. H. M., Chaudhuri, B. and Kiaei, S., “A pseudo-concurrent 0.18 μm multi-band CMOS LNA,” IEEE MTT-S International Microwave Symposium Digest, v. 1, pp. A181–A184, June 2003. The foregoing techniques are disadvantageous in that 1) they need external switches to select between different matching networks, thus increasing insertion loss and noise figure (NF); 2) they have inferior filtering/rejection to interferers due to either broadband matching or multiple resonant frequencies of the matching networks, thus increasing the LNA linearity requirement; 3) they have inferior isolation between multiple input signals because there is only one input node to the LAN, particularly if the frequencies of the multiple radio standards are not distant; 4) there is not an antenna filter available in the present market to support multiple frequency bands; and 5) although for systems such as GPRS and EDGE, there is only one frequency band that needs to be active at any time on the IC, the filters on the PCB cannot be turned off, resulting in large interference from the inactive to the active frequency bands.
In view of the foregoing, it is highly desirable and advantageous to provide a system and method that employs fewer LNAs on a single chip than that employed using known techniques, but that is still able to support multiple radio standards.